Intel aims advanced Xeon 6+ at AI edge computing
At the Mobile World Conference show in Barcelona, Intel showcased its most advanced processor yet, the Xeon 6+ processor, codenamed “Clearwater Forest.” Technically, it is one of Intel’s most complex chiplet designs, with a package that combines a total of 12 compute chiplets manufactured on a mix of Intel 18A node, Intel 7, and Intel 3 manufacturing processes.
Clearwater Forest supports the existing Xeon server platform socket, 12 memory channels, 96 PCIe 5.0 lanes, and 64 CXL 2.0 lanes. It supports memory up to DDR5-8000.The chip contains 288 E-cores, for Efficiency, with a high-bandwidth on-chip fabric to link two chips in a two-socket design.
One of the primary target markets is cloud providers has dozens if not hundreds of virtual machines can be spun up on a single processor. But also, Intel is targeting network environments through the Radio Access Network (RAN), 5G Core, and edge, while maintaining efficiency, openness, and cost control.
Clearwater Forest supports the existing Xeon server platform socket, 12 memory channels, 96 PCIe 5.0 lanes, and 64 CXL 2.0 lanes. It supports memory up to DDR5-8000.The chip contains 288 E-cores, for Efficiency, with a high-bandwidth on-chip fabric to link two chips in a two-socket design.
One of the primary target markets is cloud providers has dozens if not hundreds of virtual machines can be spun up on a single processor. But also, Intel is targeting network environments through the Radio Access Network (RAN), 5G Core, and edge, while maintaining efficiency, openness, and cost control.
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